This invention relates to a switching circuit which comprises an output field effect transistor.
In the manner which will later be described more in detail, a conventional switching circuit comprises an output field effect transistor, a comparator, a bias power circuit, and a limiting circuit. The output field effect transistor has an output source electrode, an output drain electrode, and an output gate electrode. The output drain electrode is connected to a positive electrode of a power supply through a load resistor. The output source electrode is connected to a negative electrode of the power supply through a current sensing resistor. The output gate electrode is supplied with an input voltage.
The comparator has a load input terminal, a reference input terminal, and a compare output terminal. The load input terminal is connected to a load node of the output source electrode and the current sensing resistor. The reference input terminal is connected to a positive electrode of a first reference power supply. The load node has a load sensing voltage. The load input terminal is supplied with the load sensing voltage. The reference input terminal is supplied with a first reference voltage from the first reference power supply. The comparator compares the load sensing voltage with the first reference voltage to produce a compare output voltage when the load sensing voltage is higher than the first reference voltage.
The limiting circuit is connected to the compare output terminal and the output gate electrode. The limiting circuit supplies a limiting voltage to the output gate electrode when the limiting circuit is supplied with the compare output voltage. The limiting voltage is lower than the bias voltage.
Inasmuch as the load sensing resistor is in series connected to the output source electrode of the output field effect transistor, the conventional switching circuit has a high power consumption.
In the manner which will later be described more in detail, another conventional switching circuit comprises an output field effect transistor, a comparator, a bias power circuit, and a limiting circuit. The output field effect transistor has an output source electrode, an output drain electrode, and an output gate electrode. The output drain electrode is connected to a positive electrode of a power supply. The output source electrode is connected to a negative electrode of the power supply through a load resistor.
The comparator has a load input terminal, a reference input terminal, and a compare output terminal. The load input terminal is connected to a load node of the output source electrode and the load resistor. The reference input terminal is connected to a second negative electrode of a second reference power supply. The load node has a load sensing voltage. The load input terminal is supplied with the load sensing voltage. The reference input terminal is supplied with a second reference voltage from the second reference power supply. The comparator compares the load sensing voltage with the second reference voltage to produce a compare output voltage when the load sensing voltage is lower than the second reference voltage.
When the output gate electrode is, at a first time instant, supplied with the input voltage, a voltage of the reference input terminal becomes the second reference voltage at a second time instant which is later than the first time instant. The another conventional circuit can not detect an unreasonable current at the load resistor in a time from the first time instant to the second time instant. Consequently, the another conventional switching circuit needs a delay circuit which does not supply the compare output voltage to the limiting circuit in the time from the first time instant to the second time instant.